The semiconductor device fabrication process uses plasma processing at different stages to make semiconductor devices, which may include a microprocessor, a memory chip, and other types integrated circuits and devices. Plasma processing involves energizing a gas mixture by imparting energy to the gas molecules by introducing RF (radio frequency) energy into the gas mixture. This gas mixture is typically contained in a vacuum chamber, referred to as a plasma chamber, and the RF energy is typically introduced into the plasma chamber through electrodes.
In a typical plasma process, the RF generator generates power at a radio frequency—which is broadly understood as being within the range of 3 kHz and 300 GHz—and this power is transmitted through RF cables and networks to the plasma chamber. In order to provide efficient transfer of power from the RF generator to the plasma chamber, an intermediary circuit is used to match the fixed impedance of the RF generator with the variable impedance of the plasma chamber. Such an intermediary circuit is commonly referred to as an RF impedance matching network, or more simply as an RF matching network.
The typical RF matching network includes variable capacitors and a control circuit with a microprocessor to control the capacitance values of the variable capacitors. Although several different configurations for RF matching networks are known, for simplicity, the remainder of the description will be in the context of one form of ‘L’ type RF matching network, with the understanding that one of skill in the art may apply the same principles to other types of RF matching networks.
RF matching networks that use capacitor arrays formed from a plurality of discrete capacitors are able to increase the switching speed of the matching network over the more traditional analogue variable capacitors. One example of a capacitor array that may be used in an RF matching network is described in U.S. Pat. No. 7,251,121, the disclosure of which is incorporated herein by reference in its entirety. With the increase in switching speed provided through the use of capacitor arrays, the bottleneck for achieving a faster switching speed is now often found in other parts of the RF matching network. One such bottleneck lies in the calculations that need to be done prior to switching.